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summary
1800-2012 - IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language
description
Standard number: 1800-2012. Status: Superseded. DOI: 10.1109/IEEESTD.2013.6469140
Details
Publisher
IEEE
File size
10.91 MB
Pages
1315
Format
PDF
Publication date
2013-12-01
ISBN-13
978-9-787-50840-4
ISBN-13 plain
9789787508404
ISBN-10
9787508400