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summary
62530-2007 - IEC 62530 Ed. 1 (IEEE Std 1800(TM)-2005): Standard for SystemVerilog - Unified Hardware Design, Specification, and Verification Language
description
Standard number: 62530-2007. Status: Superseded. DOI: 10.1109/IEEESTD.2007.4410440
Details
Publisher
IEEE
File size
7.23 MB
Pages
668
Format
PDF
Publication date
2007-12-01
ISBN-13
978-2-831-89349-5
ISBN-13 plain
9782831893495
ISBN-10
2831893496