What is IEC 62148-21 about?
BS EN IEC 62148 is a series on fibre optic active components and devices. Active fibre-optical components are available for multi-mode and single-mode fibres. BS EN IEC 62148-21 specifies the electrical interface of PIC packages composed of optical transmitters and receivers that enable mechanical and electrical interchangeability of PIC packages. In BS EN IEC 62148-21, the electrical interface for the S-FBGA package is informative.
BS EN IEC 62148-21 covers design guidelines of the electrical interface for photonic integrated circuit (PIC) packages using silicon fine-pitch ball grid array (S-FBGA) and silicon fine-pitch land grid array (S-FLGA).
Who is BS EN IEC 62148-21 for?
BS EN IEC 62148-21 on fibre optic active components and devices are useful for:
- Telecommunication component and equipment manufacturers
- Design engineers
- Quality control personnel
- Research and development facilities
- Inspection and testing bodies
Why should you use BS EN IEC 62148-21?
Fibre optic active components and devices components are used for fibre-optical data transmission in communication applications. BS EN IEC 62148‑21 provides you with dimension and tolerance specifications for the electrical interface for photonic integrated circuit (PIC) packages that you need to adhere to. Following the design guidelines given in BS EN IEC 62148‑15 help you to enhance performance, and optical packages capable of supporting high data rates.
BS EN IEC 62148‑21 guides you about the outline of the electrical interface for silicon fine-pitch ball grid array (S-FBGA) and silicon fine-pitch land grid array (S-FLGA). Also provides you with dimensions of the optical terminal area and its guard band area.
BS EN IEC 62148-21 implementation describes S-FBGA, a device composed of the silicon die, a dielectric layer(s) on the die, rerouting wires from the die pads to outer balls on the dielectric layer(s), and outer balls with heights more than 0,1 mm and S-FLGA, a device composed of the silicon die, a dielectric layer(s) on the die, rerouting wires from the die pads to outer lands on the dielectric layer(s), and outer lands with heights of 0,1 mm or less.
BS EN IEC 62148-21 ensures that the design of the interfacing of PIC packages is done adequately as it is one of the advanced microcontrollers developed by microchip technologies and it integrates all types of advanced interfacing ports and memory modules. These controllers are more advanced than a normal microcontroller.
Design guidelines described in BS EN IEC 62148-21 make certain that the electrical interface of PIC packages using silicon fine-pitch ball grid array (S-FBGA) and silicon fine-pitch land grid array (S-FLGA) be precise because like a normal microcontroller, the PIC chip also combines a microprocessor unit called CPU and is integrated with various types of memory modules (RAM, ROM, EEPROM etc.), I/O ports, timers/counters, communication ports, etc.
What’s changed since the last update?
BS EN IEC 62148-21:2021 supersedes BS EN IEC 62148-21:2019. BS EN IEC 62148-21:2021 includes a technical change with respect to BS EN IEC 62148-21:2019. This includes a change in a specification of an electric guard band area around the optical terminal area, to allow applications with electric signals at higher symbol rates (e.g., 50 Gbaud and 100 Gbaud).
