What is BS IEC 63011-3 about?
BS IEC 63011-3 is the third part of the BS IEC 63011 series of standards that specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Note: 3-D IC specifications covered by BS IEC 63011-3 are the following:
- Application: digital consumer and mobile;
- Aperating voltage: 0,1 V to 5,0 V,
- Operating frequency: less than 2,0 GHz
Note: BS IEC 63011-3 does not describe the equipment for the measurement.
Who is BS IEC 63011-3 for?
BS IEC 63011-3 on integrated circuits is useful for:
- Integrated circuits manufacturers
- Microchip manfacturers
- Electronic appliance manufacturers
Why should you use BS IEC 63011-3?
Since advanced semiconductor technology is complicated and its development cost is higher, the SoC application is limited to use only for a few products. Those SoC's cost is not appropriate for all embedded systems. Multi-chip implementation is a way to solve this issue. It implements a very large logic gate on the separated SoC and ASIC logic chips, connecting each other. This multi-chip interconnection technique provides also the implementation of heterogeneous technology VLSI chips. BS IEC 63011-3 focuses on interconnect methodology to implement multi-chip VLSI for the three-dimensional integrated circuit. Through-silicon via (TSV) and micro bump interconnect technology; the wire number between VLSI can be tremendously wider. It also allows to connect chips with on-chip bus interconnection, which has several thousand signal connections.
