loading preview...
summary
ADDENDUM No. 6 to JESD8 - HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS:
Details
Publisher
JEDEC
File size
408.27 KB
Pages
16
Format
PDF
Publication date
1995-12-01
