What is PD CEN/TR 17602-30-01 about?
PD CEN/TR 17602-30-01 is part of a series of documents that provides guidelines to perform the worst-case analysis. The worst-case analysis is generally carried out when designing the circuit. For selected circuitry, worst case analysis (WCA) can be used to validate a conceptual design approach.
PD CEN/TR 17602-30-01 applies to all electrical and electronic equipment. The worst-case analysis (WCA) method given in PD CEN/TR 17602-30-01 can also be applied at the subsystem level to justify electrical interface specifications and design margins for equipment.
PD CEN/TR 17602-30-01 applies to all project phases where electrical interface requirements are established, and circuit design is carried out.
Who is PD CEN/TR 17602-30-01 for?
PD CEN/TR 17602-30-01 on worst-case analysis for space product assurance is applicable to:
- Aerospace electric equipment industries and systems
- Space systems and operations
- Spacecraft and related components making industries
- Testing agencies involved in the inspection of spacecraft
- Design engineers for space products
Why should you use PD CEN/TR 17602-30-01?
The objective of space product assurance is to ensure that space product accomplishes their defined mission objectives and more specifically, that they are safe and reliable. The worst-case analysis (WCA) should conform to all requirements, both on the functional block level and at the circuit level.
The worst-case analysis (WCA) method provided in PD CEN/TR 17602-30-01 is performed on electronic and electrical equipment to demonstrate that it performs within specification despite particular variations in its constituent part parameters and the imposed environment, at the end of an overall lifetime (EOL).
The worst-case analysis (WCA) method given in PD CEN/TR 17602-30-01 helps you to demonstrate sufficient operating margins for all operating conditions in electronic circuits.
The worst-case analysis (WCA) method provided in PD CEN/TR 17602-30-01 also helps you to validate a conceptual design approach for selected circuitry.
