What is PD IEC TR 62878‑2‑7-Guidelines for accelerated stress testing of passive embedded circuit boards about?
PD IEC TR 62878 is a technical report on device embedding assembly technology. PD IEC TR 62878‑2‑7 provides guidelines for accelerated stress testing of passive embedded circuit boards to ensure high-quality circuit boards and evaluate failures in passive embedded circuit boards.
PD IEC TR 62878‑2‑7 is the seventh subpart of the second part of a multi-part series that describes the accelerated stress testing of passive embedded circuit boards. It can be used for screening finished boards, including multilayer and high-density interconnection (HDI) boards. These boards are mainly for mobile devices.
Who is PD IEC TR 62878‑2‑7-Guidelines for accelerated stress testing of passive embedded circuit boards for?
PD IEC TR 62878‑2‑7 on guidelines for accelerated stress testing of passive embedded circuit boards is relevant to:
- Electronic device manufacturers
- Passive embedded circuit boards manufacturers
- Electronic engineer
Why should you use PD IEC TR 62878‑2‑7-Guidelines for accelerated stress testing of passive embedded circuit boards?
The concept of embedded passives technology (EPT) is to fabricate and bury within the layers of an interconnecting substrate passive components such as resistors and capacitors (R&C) into the substrate of Printed Board (PB) during the fabrication process of the raw board. PD IEC TR 62878‑2‑7 provides you with the combined stress test method for passive embedded circuit boards to help simulate real-world conditions.
With compliance and obedience to IEC TR 62878‑2‑7, you can evaluate the failures that occurs when the resistance is increased in these circuit boards to ensure the sustainability of these embedded circuit boards in different climatic conditions. The evaluation results are useful in monitoring the voltage to check the change in resistance. In addition, assist in manufacturing a standardised product of high-quality that has global acceptance in the market.
